[labnetwork] Copper Through-Glass Vias on fused silica

[Artner, Diane M]

For the electroplating of vias with Pt seed, have you seen poor nucleation, basically large grain growth vs uniform small grain size bottom up fill?

From: labnetwork <labnetwork-bounces at mtl.mit.edu> On Behalf Of Christopher Alpha
Sent: Thursday, February 27, 2025 10:41 AM
To: labnetwork at mtl.mit.edu
Subject: Re: [labnetwork] Copper Through-Glass Vias on fused silica


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Hi Folks,



(RE: Mac's comments)



We often do Pt seed layers by ALD for via Cu electroplating fills...you can get voids though depending on aspect ratio and how you drive the plating.  If a a hollow wire is OK this is fine to do in this fashion.



If you want a full solid fill we have done Au or Pt sputter on only one side of a very high aspect ratio via and basically try to sputter the hole mostly if not fully closed and use a plating fixture that makes contact on the back side with the Pt seed, leaving the other side exposed in the plating bath, then you can get a nice fill by plating from the bottom of the via up.  Overtop the via/wafer's surface, and CMP everything clean and flat (remove seed either selectively with wet chemistry if possible or CMP that off too).



Your mileage may vary...electroplating is a dark art.



Best,

C

--

Christopher Alpha

User Program Manager

Cornell Nanoscale Facility

Cornell University

250 Duffield Hall

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Ithaca, NY 14853

tel (607)254-4913



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On 2/26/25 13:04, Hathaway, Malcolm R wrote:
Hi Larry,

As it happens, Cu is not an established ALD process yet (that I am aware of).

Pt is common, but for your purposes (filling a 20um diameter hole) Pt would likely too expensive.  In fact, ALD is probably not a viable option because you will need a layer slightly thicker than the radius of the hole (i.e. 10 um) and ALD of almost anything in a 10um thickness will take 2-3 weeks (at least in our systems).  We tend to speak of dep thickness/cycle (~1A) because to speak of rate in thickness/min is too embarrassing!

Which is to say, ALD is slow.

Typical films are under 200nm.

Material-wise, Pt, Ru, and some other conductors are available, but they tend to be on the (even) slower side.  Some newer systems will get cycle times down to achieve 20-30 cy/min, but still nothing approaching CVD growth rates.

A Pt liner (or other conductive material) with Cu electroplating is much closer to a standard process for this sort of thing.  And if you wanted to get fancy you could even consider selective W CVD, but that would require a bit of process development.

I'm happy to chat about this off-line if you like.  Hopefully others with proper electroplating experience will chime in shortly.


Mac
Harvard CNS


________________________________
From: labnetwork <labnetwork-bounces at mtl.mit.edu><mailto:labnetwork-bounces at mtl.mit.edu> on behalf of Hess, Larry A. (GSFC-5530) <larry.hess-1 at nasa.gov><mailto:larry.hess-1 at nasa.gov>
Sent: Wednesday, February 26, 2025 9:36 AM
To: labnetwork at mtl.mit.edu<mailto:labnetwork at mtl.mit.edu> <labnetwork at mtl.mit.edu><mailto:labnetwork at mtl.mit.edu>
Subject: [labnetwork] Copper Through-Glass Vias on fused silica


Hi,

I am looking for a (hopefully established) source to deposit ALD copper on Though-Glass Vias.

The vias are about 20um in diameter with an aspect ratio of about 10:1.

I would also consider Cu electroplating( after an appropriate ALD adhesion/base layer), but I’m not sure how feasible that is given the via diameter and aspect ratio.



Thanks for your help!



Larry



Larry A. Hess, PhD

NASA

Goddard Space Flight Center

8800 Greenbelt Road

Code 553, Detector Systems Branch

Building 11, Room E011

Greenbelt, MD 20771

301-286-0259 (P)

301-286-1672 (F)





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