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<div>Hi Kurt,</div>
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<div>If I recall correctly from my experience working in a CMOS industrial fab many years ago, critical thermal oxidation runs (i.e.., gate oxides) had to begin within 30 minutes of the preceding RCA clean/HF dip step. Beyond 30 minutes, an additional HF dip
(10:1) was required, with no repeat of the RCA clean step deemed necessary. This could only be performed a limited number of times (3?) before the affected production lot required special attention from engineering.</div>
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<div>I also coordinated several extended production plant shutdowns which lasted anywhere from a few days up to 1.5 weeks. In all cases, production lots at critical production steps had to be "parked" at specific process locations and always in dry boxes with
constant N2 purges. We never permitted wafer batches to be parked with exposed silicon. Specifically, wafers could not be parked before a gate oxidation run: the gate oxide had to be grown before the shutdown.</div>
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<div>Hope this helps.</div>
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<div>Best regards,</div>
<div>Vito</div>
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<div><font class="Apple-style-span" color="#000000"><font class="Apple-style-span" face="Calibri" style="font-size: 14px; "><font face="Calibri,sans-serif">Vito Logiudice </font>P.<font face="Calibri,sans-serif">Eng.</font></font></font></div>
<div><font class="Apple-style-span" color="#000000"><font class="Apple-style-span" face="Calibri"><font face="Calibri,sans-serif" style="font-size: 14px; ">Director of Operations, Quantum NanoFab</font></font></font></div>
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<div><font class="Apple-style-span" color="#000000"><font class="Apple-style-span" face="Calibri"><font face="Calibri,sans-serif" style="font-size: 14px; ">Waterloo, ON Canada N2L 3G1</font></font></font></div>
<div><font class="Apple-style-span" color="#000000"><font class="Apple-style-span" face="Calibri"><font face="Calibri,sans-serif" style="font-size: 14px; ">Tel.: (519) 888-4567 ext. 38703</font></font></font></div>
<div><span style="font-size: 14px; ">Email: <a href="mailto:vito.logiudice@uwaterloo.ca">vito.logiudice@uwaterloo.ca</a></span></div>
<div><span style="font-size: 14px; ">Website: </span><a href="https://fab.qnc.uwaterloo.ca">https://fab.qnc.uwaterloo.ca</a></div>
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<span style="font-weight:bold">From: </span>Kurt Kupcho <<a href="mailto:kurt.kupcho@wisc.edu">kurt.kupcho@wisc.edu</a>><br>
<span style="font-weight:bold">Date: </span>Wednesday, 18 March, 2015 3:58 PM<br>
<span style="font-weight:bold">To: </span>"<a href="mailto:labnetwork@mtl.mit.edu">labnetwork@mtl.mit.edu</a>" <<a href="mailto:labnetwork@mtl.mit.edu">labnetwork@mtl.mit.edu</a>><br>
<span style="font-weight:bold">Subject: </span>[labnetwork] Pre-oxidation furnace clean<br>
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<p class="MsoNormal">Hi everyone – <o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">For a traditional thermal oxidation furnace, for things like building gate oxides, the general practice is to do a pre-furnace clean using piranha, RCA 1, RCA 2, and HF in successive cleanings beforehand. I was wondering for other academic
cleanrooms following this practice what rules do you have in place for once the students clean their samples and how long they can store these samples before putting into the oxidation furnace. Let’s assume that the students redo the HF dip to remove the
native oxide layer that has reformed, and they stored the samples in a clean container in a N2 dry box inside the cleanroom. Do you require them to put the sample in the oxidation furnace immediately after pre-furnace clean? 1 day? 1 week? Also, if you do
have a specific rule for this do you have any cleanliness data to back it up? Thank you ahead of time for your insightful responses!<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Best,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Kurt<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">---------------------------------------------------<o:p></o:p></p>
<p class="MsoNormal">Kurt Kupcho<o:p></o:p></p>
<p class="MsoNormal">Microelectronics Engineer<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">WCAM<o:p></o:p></p>
<p class="MsoNormal">1550 Engineering Drive<o:p></o:p></p>
<p class="MsoNormal">ECB Room 3110<o:p></o:p></p>
<p class="MsoNormal">Madison, WI 53706<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">E: <a href="mailto:kurt.kupcho@wisc.edu">kurt.kupcho@wisc.edu</a><o:p></o:p></p>
<p class="MsoNormal">T: 608-262-2982<o:p></o:p></p>
<p class="MsoNormal">F: 608-265-2614<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><img border="0" width="328" height="62" id="Picture_x0020_1" src="cid:image002.png@01D0618C.0A1C58D0" alt="http://wcam.engr.wisc.edu/logos/pics/wcam420x80.png"><o:p></o:p></p>
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