<html>
<head>
<meta content="text/html; charset=windows-1252"
http-equiv="Content-Type">
</head>
<body bgcolor="#FFFFFF" text="#000000">
Hi Kamal --
<br>
<br>
At Stanford, we've been trying to evolve a materials policy that is
more accommodating of non-CMOS processing. Even our most die-hard
electronics researchers are demanding more flexible processing
policies. We try to take special processing requests on a
case-by-case basis with the goal of evolving our policies. The
3-tier system we have of clean (front end CMOS), semiclean (backend
CMOS) and gold (catch all for everything else, with different
classes of "gold") has served us well for many years, but is overly
simplistic. We have certainly stretched the definitions when it
comes to Litho, for example, where we don't have dedicated clean,
semiclean or gold tools. The approach we are trying to take now is
to assess where the real transfer risks are (i.e., wafer handling,
volatility, ion bombardment, etc.) and what kind of engineering
controls might mitigate them. In fact, this has been the underlying
rationale for our Litho policy -- contamination risk is minimized
because there will always be wet cleans before wafers undergo any
high temp processing steps.
<br>
<br>
But back to your question. Our ICP PECVD system is defined as a
"flexible" or "all" system, which means that it can be used for
CMOS-clean processing, but also for processes that might otherwise
be classified as "gold" in our old nomenclature. By default, it is
non-CMOS, but can be considered "clean" once a short plasma clean
and coat process is performed. The rationale is that any potentially
contaminated films previously deposited are removed with the plasma
clean and any non-volatiles are covered up by the nitride precoat
process. It is also the responsibility of the user to perform this
clean and coat if he/she wants a CMOS-compatible process. This
doesn't mean that everything can be processed in this system, but
would not currently exclude wafers with gold pads.
<br>
<br>
Dr. Jim McVittie, our resident expert in many areas, especially
plasma processing, has described an experiment in which he placed a
gold sample in a PECVD system (our legacy STS dual frequency,
non-ICP, dep system). With an Ar plasma, he found gold deposited on
an adjacent sample (analyzed by TXRF). After doing a plasma clean
and nitride coat, gold was no longer detectable. Argon sputter
probably presents the worst-case situation for carry-over -- most
processes would be deposition-only so that gold would be exposed to
plasma for minimal time. This result makes us reasonably confident
that our PECVD policy is not damaging to the typical electronic
devices processed in our lab.<br>
<br>
We are also trying to evolve our policy with regard to ICP etchers.
If you or anyone else has guidelines that accommodate more materials
but without significant risk to CMOS devices, I'd really like to
learn more.<br>
<br>
Thanks,<br>
<br>
Mary<br>
<br>
<br>
<span class="moz-txt-tag">-- <br>
</span>Mary X. Tang, Ph.D.
<br>
Stanford Nanofabrication Facility
<br>
Paul G. Allen Bldg 141, Mail Code 4070
<br>
Stanford, CA 94305
<br>
(650)723-9980
<br>
<a class="moz-txt-link-abbreviated" href="mailto:mtang@stanford.edu">mtang@stanford.edu</a>
<br>
<a class="moz-txt-link-freetext" href="http://snf.stanford.edu">http://snf.stanford.edu</a>
<br>
<br>
<br>
<br>
<br>
<div class="moz-cite-prefix">On 6/5/2015 2:33 AM, Kamal Yadav wrote:<br>
</div>
<blockquote
cite="mid:CAOfoCygUc31apd4_6u9LV1R+TRBPvOdwG30-TrxG3wH2D_xEWg@mail.gmail.com"
type="cite">
<div dir="ltr">Dear All,
<div><br>
</div>
<div>Though may not make much sense, but would wanted to know if
there are any successful cleaning procedures for chamber to
remove affect of gold usage/contamination in that chamber.</div>
<div><br>
</div>
<div>We want to use the chamber with gold pads exposed to the
plasma, but at the same time, need to allow those whose
devices may get affected from gold [in CMOS]. Any intermediate
cleaning/deposition that could significantly (?) reduce the
affect. </div>
<div><br>
</div>
<div>Our chamber [ICPCVD] has been used [5+ years] with gold
pads [exposed to plasma] and so far other groups have not
reported any issues with their devices, so its working out
fine till now.</div>
<div><br>
</div>
<div>But we want to take precautionary measures if any.</div>
<div><br>
</div>
<div>Thanks a lot!</div>
<div>
<div><br>
</div>
-- <br>
<div class="gmail_signature">
<div dir="ltr">
<div>
<div dir="ltr">
<div>
<div dir="ltr">
<div dir="ltr">
<div>Thanks,<br>
</div>
<div>Kamal Yadav</div>
<div>Sr. Process Technologist</div>
<div>Electrical Engineering</div>
<div>IIT Bombay</div>
<div>Mobile: 7506144798</div>
</div>
</div>
</div>
</div>
</div>
</div>
</div>
</div>
</div>
<br>
<fieldset class="mimeAttachmentHeader"></fieldset>
<br>
<pre wrap="">_______________________________________________
labnetwork mailing list
<a class="moz-txt-link-abbreviated" href="mailto:labnetwork@mtl.mit.edu">labnetwork@mtl.mit.edu</a>
<a class="moz-txt-link-freetext" href="https://www-mtl.mit.edu/mailman/listinfo.cgi/labnetwork">https://www-mtl.mit.edu/mailman/listinfo.cgi/labnetwork</a>
</pre>
</blockquote>
<br>
</body>
</html>