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Hi All,
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<div class="">I appreciate all the responses. I’m going to try the Crystalbond and heat release tape. 😄</div>
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<div class="">Thanks,<br class="">
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Long</div>
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<div class="">On Apr 12, 2022, at 4:18 PM, Aebersold,Julia W. <<a href="mailto:julia.aebersold@louisville.edu" class="">julia.aebersold@louisville.edu</a>> wrote:</div>
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We have been using crystal bond. It provides good thermal transfer and it cleans up well with solvents.<o:p class=""></o:p></div>
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<span style="" class="">Cheers!<o:p class=""></o:p></span></div>
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<span style="" class="">Julia Aebersold, Ph.D.</span><span style="font-size: 12pt; font-family: "Times New Roman", serif;" class=""><o:p class=""></o:p></span></div>
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<span style="" class="">Manager, Micro/Nano Technology Center</span><span style="font-size: 12pt; font-family: "Times New Roman", serif;" class=""><o:p class=""></o:p></span></div>
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<span style="" class="">University of Louisville</span><span style="font-size: 12pt; font-family: "Times New Roman", serif;" class=""><o:p class=""></o:p></span></div>
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<b class="">From:</b><span class="Apple-converted-space"> </span>labnetwork <<a href="mailto:labnetwork-bounces@mtl.mit.edu" style="color: blue; text-decoration: underline;" class="">labnetwork-bounces@mtl.mit.edu</a>><span class="Apple-converted-space"> </span><b class="">On
Behalf Of<span class="Apple-converted-space"> </span></b>Hao-Chieh Hsieh<br class="">
<b class="">Sent:</b><span class="Apple-converted-space"> </span>Tuesday, April 12, 2022 2:54 PM<br class="">
<b class="">To:</b><span class="Apple-converted-space"> </span>Chang, Long <<a href="mailto:lvchang@central.uh.edu" style="color: blue; text-decoration: underline;" class="">lvchang@central.uh.edu</a>><br class="">
<b class="">Cc:</b><span class="Apple-converted-space"> </span><a href="mailto:labnetwork@mtl.mit.edu" style="color: blue; text-decoration: underline;" class="">labnetwork@mtl.mit.edu</a><br class="">
<b class="">Subject:</b><span class="Apple-converted-space"> </span>Re: [labnetwork] RIE through Silicon<o:p class=""></o:p></div>
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<span style="font-size: 9pt; font-family: "Segoe UI", sans-serif; color: rgb(33, 33, 33);" class="">You don't often get email from<span class="Apple-converted-space"> </span><a href="mailto:hahsieh@ucsc.edu" style="color: blue; text-decoration: underline;" class="">hahsieh@ucsc.edu</a>.<span class="Apple-converted-space"> </span><a href="https://urldefense.com/v3/__http://aka.ms/LearnAboutSenderIdentification__;!!LkSTlj0I!AT6I_jlc49FhvQspmfihIEFuSwb318xqvWcjGr3hb6RxGIEhVN0wrwdWki6bnYwtDFButAWQr7lTK5HVLcZUPPFz9ec0OMAVRu9T$" style="color: blue; text-decoration: underline;" class="">Learn
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Hi Long, <o:p class=""></o:p></div>
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We used a vacuum grease to attach the silicon wafer to the Al carrier for DRIE etching in Utah nanofab . I was able to etch a 50x50um opneing through a standard 4-inch silicon wafer. Releasing is time-consuming by soaking overnight in xylene and final device
came out pretty good. We can discuss more. <br class="">
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Thanks<o:p class=""></o:p></div>
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Hao-Chieh<o:p class=""></o:p></div>
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On Tue, Apr 12, 2022 at 11:22 AM Kamal Yadav <<a href="mailto:kamal.yadav@gmail.com" style="color: blue; text-decoration: underline;" class="">kamal.yadav@gmail.com</a>> wrote:<o:p class=""></o:p></div>
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Hi Long,<span class="Apple-converted-space"> </span><o:p class=""></o:p></div>
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Your PR will mostly char/ or burn, so cool grease is recommended but when you do a through silicon via, you may be exposing the cool grease to plasma and I am not sure what kind of damage it will bring to the devices/chamber. Of course exposing plasma to photoresist
(if that works) is fine. Thanks<o:p class=""></o:p></div>
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On Tue, Apr 12, 2022 at 9:07 AM Hollingshead, Dave <<a href="mailto:hollingshead.19@osu.edu" target="_blank" style="color: blue; text-decoration: underline;" class="">hollingshead.19@osu.edu</a>> wrote:<o:p class=""></o:p></div>
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Hi Long,<o:p class=""></o:p></div>
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We do this routinely with our DRIE system. As Jer mentioned, we typically use small drops of santovac 5 oil to adhere the two wafers together to provide thermal conduction. In our case we see etch rate changes or PR “burning” without a good thermal conductor
between the samples.<o:p class=""></o:p></div>
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-Dave<o:p class=""></o:p></div>
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<b class="">From:</b><span class="Apple-converted-space"> </span>labnetwork <<a href="mailto:labnetwork-bounces@mtl.mit.edu" target="_blank" style="color: blue; text-decoration: underline;" class="">labnetwork-bounces@mtl.mit.edu</a>><span class="Apple-converted-space"> </span><b class="">On
Behalf Of<span class="Apple-converted-space"> </span></b>Jeremy Upham<br class="">
<b class="">Sent:</b><span class="Apple-converted-space"> </span>Monday, April 11, 2022 23:08<br class="">
<b class="">Cc:</b><span class="Apple-converted-space"> </span><a href="mailto:labnetwork@mtl.mit.edu" target="_blank" style="color: blue; text-decoration: underline;" class="">labnetwork@mtl.mit.edu</a><br class="">
<b class="">Subject:</b><span class="Apple-converted-space"> </span>Re: [labnetwork] RIE through Silicon<o:p class=""></o:p></div>
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<span style="font-size: 1pt; color: white;" class="">I think your plan could work, so I'm not sure that I see the problem In my experience the carbon in the PR can contribute to the plasma chemistry and affect the etch, so I tend to use vacuum grease as a thermally
conducting binder between</span><o:p class=""></o:p></div>
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I think your plan could work, so I'm not sure that I see the problem<o:p class=""></o:p></div>
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In my experience the carbon in the PR can contribute to the plasma chemistry and affect the etch, so I tend to use vacuum grease as a thermally conducting binder between the etched sample and the backing wafer instead. Though your system may well work for your
recipe.<o:p class=""></o:p></div>
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Hope that helps,<o:p class=""></o:p></div>
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Jer Upham PhD<br class="">
Senior Lab Manager / Research Scientist<br class="">
Quantum Photonics Group<br class="">
University of Ottawa<br class="">
Tel.: 1 (613) 562-5800 ext 7325<o:p class=""></o:p></div>
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On Mon, Apr 11, 2022 at 6:54 PM Chang, Long <<a href="mailto:lvchang@central.uh.edu" target="_blank" style="color: blue; text-decoration: underline;" class="">lvchang@central.uh.edu</a>> wrote:<o:p class=""></o:p></div>
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<b class=""><span style="font-size: 9pt; color: rgb(255, 66, 51);" class="">Attention : courriel externe | external email</span></b><o:p class=""></o:p></div>
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Hi Guys,<o:p class=""></o:p></div>
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I have an Oxford RIE with backside Helium. I want to etch through the silicon wafer (380um thick). The largest pattern is a 1mm diameter circle. My plan is to ride the 4” sample wafer on a 4" carrier wafer with PR. Does anyone have a good solution to this problem?<o:p class=""></o:p></div>
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Thanks,<o:p class=""></o:p></div>
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<span style="" class="">Long</span><o:p class=""></o:p></div>
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--<span class="Apple-converted-space"> </span><o:p class=""></o:p></div>
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Thanks,<o:p class=""></o:p></div>
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Kamal <o:p class=""></o:p></div>
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